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722 lines
26 KiB
722 lines
26 KiB
/*
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u8x8_d_ssd1320.c
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Universal 8bit Graphics Library (https://github.com/olikraus/u8g2/)
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Copyright (c) 2020, olikraus@gmail.com
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All rights reserved.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice, this list
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of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright notice, this
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list of conditions and the following disclaimer in the documentation and/or other
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materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
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CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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https://github.com/olikraus/u8g2/issues/1351
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SSD1320:
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160 x 160 dot matrix
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16 gray scale
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Adapted from u8x8_d_ssd1322.c with the command set of the SSD1320 controller
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"official" procedure is described here: https://github.com/olikraus/u8g2/wiki/internal
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NOTE: U8x8 does NOT work! --> not clear, needs to be checked
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https://github.com/olikraus/u8g2/issues/1816
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*/
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#include "u8x8.h"
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static const uint8_t u8x8_d_ssd1320_cs1_160x132_nhd_powersave0_seq[] = {
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
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U8X8_C(0x0af), /* ssd1320: display on */
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U8X8_END_TRANSFER(), /* disable chip */
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U8X8_END() /* end of sequence */
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};
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static const uint8_t u8x8_d_ssd1320_cs1_160x132_nhd_powersave1_seq[] = {
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
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U8X8_C(0x0ae), /* ssd1320: display off */
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U8X8_END_TRANSFER(), /* disable chip */
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U8X8_END() /* end of sequence */
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};
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/*
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input:32
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one tile (8 Bytes; 1 byte per column)
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output:
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Tile for SSD1320 (32 Bytes)
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*/
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static uint8_t u8x8_ssd1320_to32_dest_buf[32];
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static uint8_t *u8x8_ssd1320_8to32(U8X8_UNUSED u8x8_t *u8x8, uint8_t *ptr)
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{
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uint8_t v;
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uint8_t a,b;
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uint8_t i, j;
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uint8_t *dest;
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for( j = 0; j < 4; j++ )
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{
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dest = u8x8_ssd1320_to32_dest_buf;
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dest += j;
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a =*ptr;
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ptr++;
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b = *ptr;
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ptr++;
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for( i = 0; i < 8; i++ )
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{
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v = 0;
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if ( a&1 ) v |= 0x0f;
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if ( b&1 ) v |= 0xf0;
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*dest = v;
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dest+=4;
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a >>= 1;
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b >>= 1;
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}
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}
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return u8x8_ssd1320_to32_dest_buf;
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}
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uint8_t u8x8_d_ssd1320_common(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
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{
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uint8_t x;
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uint8_t y, c;
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uint8_t *ptr;
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switch(msg)
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{
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/* U8X8_MSG_DISPLAY_SETUP_MEMORY is handled by the calling function */
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/*
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case U8X8_MSG_DISPLAY_SETUP_MEMORY:
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break;
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case U8X8_MSG_DISPLAY_INIT:
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u8x8_d_helper_display_init(u8x8);
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1320_256x64_init_seq);
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break;
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*/
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case U8X8_MSG_DISPLAY_SET_POWER_SAVE:
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if ( arg_int == 0 )
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1320_cs1_160x132_nhd_powersave0_seq);
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else
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1320_cs1_160x132_nhd_powersave1_seq);
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break;
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#ifdef U8X8_WITH_SET_CONTRAST
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case U8X8_MSG_DISPLAY_SET_CONTRAST:
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u8x8_cad_StartTransfer(u8x8);
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u8x8_cad_SendCmd(u8x8, 0x081 );
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u8x8_cad_SendArg(u8x8, arg_int ); /* ssd1320 has range from 1 to 255 */
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u8x8_cad_EndTransfer(u8x8);
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break;
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#endif
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case U8X8_MSG_DISPLAY_DRAW_TILE:
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u8x8_cad_StartTransfer(u8x8);
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x = ((u8x8_tile_t *)arg_ptr)->x_pos;
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y = (((u8x8_tile_t *)arg_ptr)->y_pos);
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x += u8x8->x_offset;
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y *= 8;
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u8x8_cad_SendCmd(u8x8, 0x022 ); /* set row address, moved out of the loop (issue 302) */
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u8x8_cad_SendArg(u8x8, y);
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u8x8_cad_SendArg(u8x8, y+7);
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do {
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c = ((u8x8_tile_t *)arg_ptr)->cnt;
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ptr = ((u8x8_tile_t *)arg_ptr)->tile_ptr;
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do {
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u8x8_cad_SendCmd(u8x8, 0x021 ); /* set column address */
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u8x8_cad_SendArg(u8x8, x ); /* start */
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u8x8_cad_SendArg(u8x8, x+3 ); /* end */
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u8x8_cad_SendData(u8x8, 32, u8x8_ssd1320_8to32(u8x8, ptr));
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ptr += 8;
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x += 4;
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c--;
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} while( c > 0 );
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//x += 2;
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arg_int--;
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} while( arg_int > 0 );
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u8x8_cad_EndTransfer(u8x8);
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break;
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default:
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return 0;
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}
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return 1;
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}
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static uint8_t *u8x8_ssd1320_8to32_2(U8X8_UNUSED u8x8_t *u8x8, uint8_t *ptr)
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{
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uint8_t v;
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uint8_t a,b;
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uint8_t i, j;
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uint8_t *dest;
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for( j = 0; j < 4; j++ )
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{
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dest = u8x8_ssd1320_to32_dest_buf;
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dest += j;
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a =*ptr;
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ptr++;
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b = *ptr;
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ptr++;
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for( i = 0; i < 8; i++ )
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{
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v = 0;
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if ( a&1 ) v |= 0xf0; // changed from 0x0f to 0xf0, https://github.com/olikraus/u8g2/issues/1816
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if ( b&1 ) v |= 0x0f; // changed from 0xf0 to 0x0f, https://github.com/olikraus/u8g2/issues/1816
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*dest = v;
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dest+=4;
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a >>= 1;
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b >>= 1;
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}
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}
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return u8x8_ssd1320_to32_dest_buf;
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}
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uint8_t u8x8_d_ssd1320_common_2(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
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{
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uint8_t x;
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uint8_t y, c;
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uint8_t *ptr;
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switch(msg)
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{
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/* U8X8_MSG_DISPLAY_SETUP_MEMORY is handled by the calling function */
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/*
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case U8X8_MSG_DISPLAY_SETUP_MEMORY:
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break;
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case U8X8_MSG_DISPLAY_INIT:
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u8x8_d_helper_display_init(u8x8);
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1320_256x64_init_seq);
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break;
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*/
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case U8X8_MSG_DISPLAY_SET_POWER_SAVE:
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if ( arg_int == 0 )
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1320_cs1_160x132_nhd_powersave0_seq);
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else
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1320_cs1_160x132_nhd_powersave1_seq);
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break;
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#ifdef U8X8_WITH_SET_CONTRAST
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case U8X8_MSG_DISPLAY_SET_CONTRAST:
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u8x8_cad_StartTransfer(u8x8);
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u8x8_cad_SendCmd(u8x8, 0x081 );
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u8x8_cad_SendArg(u8x8, arg_int ); /* ssd1320 has range from 1 to 255 */
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u8x8_cad_EndTransfer(u8x8);
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break;
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#endif
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case U8X8_MSG_DISPLAY_DRAW_TILE:
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u8x8_cad_StartTransfer(u8x8);
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x = ((u8x8_tile_t *)arg_ptr)->x_pos;
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y = (((u8x8_tile_t *)arg_ptr)->y_pos);
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x += u8x8->x_offset;
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y *= 8;
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u8x8_cad_SendCmd(u8x8, 0x022 ); /* set row address, moved out of the loop (issue 302) */
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u8x8_cad_SendArg(u8x8, y);
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u8x8_cad_SendArg(u8x8, y+7);
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do {
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c = ((u8x8_tile_t *)arg_ptr)->cnt;
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ptr = ((u8x8_tile_t *)arg_ptr)->tile_ptr;
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do {
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u8x8_cad_SendCmd(u8x8, 0x021 ); /* set column address */
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u8x8_cad_SendArg(u8x8, x ); /* start */
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u8x8_cad_SendArg(u8x8, x+3 ); /* end */
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u8x8_cad_SendData(u8x8, 32, u8x8_ssd1320_8to32_2(u8x8, ptr));
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ptr += 8;
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x += 4;
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c--;
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} while( c > 0 );
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//x += 2;
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arg_int--;
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} while( arg_int > 0 );
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u8x8_cad_EndTransfer(u8x8);
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break;
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default:
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return 0;
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}
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return 1;
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}
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/*=========================================================*/
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/* 160x32 */
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static const uint8_t u8x8_d_ssd1320_cs1_160x32_nhd_flip0_seq[] = {
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
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U8X8_C(0x0a0), /* remap */
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U8X8_END_TRANSFER(), /* disable chip */
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U8X8_END() /* end of sequence */
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};
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static const uint8_t u8x8_d_ssd1320_cs1_160x32_nhd_flip1_seq[] = {
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
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U8X8_C(0x0a1), /* remap */
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U8X8_END_TRANSFER(), /* disable chip */
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U8X8_END() /* end of sequence */
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};
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static const u8x8_display_info_t u8x8_d_ssd1320_cs1_160x32_display_info =
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{
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/* chip_enable_level = */ 0,
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/* chip_disable_level = */ 1,
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/* post_chip_enable_wait_ns = */ 20,
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/* pre_chip_disable_wait_ns = */ 10,
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/* reset_pulse_width_ms = */ 100, /* ssd1320: 2 us */
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/* post_reset_wait_ms = */ 100, /* far east OLEDs need much longer setup time */
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/* sda_setup_time_ns = */ 50, /* ssd1320: 15ns, but cycle time is 100ns, so use 100/2 */
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/* sck_pulse_width_ns = */ 50, /* ssd1320: 20ns, but cycle time is 100ns, so use 100/2, AVR: below 70: 8 MHz, >= 70 --> 4MHz clock */
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/* sck_clock_hz = */ 10000000UL, /* since Arduino 1.6.0, the SPI bus speed in Hz. Should be 1000000000/sck_pulse_width_ns, increased to 8MHz (issue 215), 10 MHz (issue 301) */
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/* spi_mode = */ 0, /* active high, rising edge */
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/* i2c_bus_clock_100kHz = */ 4,
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/* data_setup_time_ns = */ 10,
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/* write_pulse_width_ns = */ 150, /* ssd1320: cycle time is 300ns, so use 300/2 = 150 */
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/* tile_width = */ 20, /* 160 pixel, so we require 20 bytes for this */
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/* tile_height = */ 4,
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/* default_x_offset = */ 0, /* this is the byte offset (there are two pixel per byte with 4 bit per pixel) */
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/* flipmode_x_offset = */ 0,
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/* pixel_width = */ 160,
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/* pixel_height = */ 32
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};
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// initialisation sequence from the Arduino Library
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// (see https://github.com/sparkfun/SparkFun_SSD1320_OLED_Arduino_Library)
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static const uint8_t u8x8_d_ssd1320_cs1_160x32_init_seq[] = {
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U8X8_DLY(1),
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
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U8X8_DLY(1),
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U8X8_C(0xae), /* display off */
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U8X8_CA(0xd5, 0xC2), /* set display clock divide ratio/oscillator frequency (set clock as 80 frames/sec) */
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U8X8_CA(0xa8, 0x1f), /* multiplex ratio 1/64 Duty (0x0F~0x3F) */
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U8X8_CA(0xa2, 0x00), /* display start line */
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U8X8_C(0xa0), /* Set Segment Re-Map: column address 0 mapped to SEG0 CS1 */
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// U8X8_C(0xa1), /* Set Segment Re-Map: column address 0 mapped to SEG0 CS2 */
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U8X8_C(0xc8), /* Set COM Output Scan Direction: normal mode CS1 */
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// U8X8_C(0xc0), /* Set COM Output Scan Direction: normal mode CS2 */
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U8X8_CA(0xd3, 0x72), /* CS1 */
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// U8X8_CA(0xd3, 0x92), /* CS2 */
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U8X8_CA(0xda, 0x12), /* Set SEG Pins Hardware Configuration: */
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U8X8_CA(0x81, 0x5a), /* contrast */
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U8X8_CA(0xd9, 0x22), /* Set Phase Length */
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U8X8_CA(0xdb, 0x30), /* VCOMH Deselect Level */
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U8X8_CA(0xad, 0x10), /* Internal IREF Enable */
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U8X8_CA(0x20, 0x00), /* Memory Addressing Mode: Horizontal */
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U8X8_CA(0x8d, 0x01), /* disable internal charge pump 1 */
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U8X8_CA(0xac, 0x00), /* disable internal charge pump 2 */
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U8X8_C(0xa4), /* display on */
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U8X8_C(0xa6), /* normal display */
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U8X8_DLY(1), /* delay 2ms */
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U8X8_END_TRANSFER(), /* disable chip */
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U8X8_END() /* end of sequence */
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};
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uint8_t u8x8_d_ssd1320_160x32(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
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{
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switch(msg)
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{
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case U8X8_MSG_DISPLAY_SETUP_MEMORY:
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u8x8_d_helper_display_setup_memory(u8x8, &u8x8_d_ssd1320_cs1_160x32_display_info);
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break;
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case U8X8_MSG_DISPLAY_INIT:
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u8x8_d_helper_display_init(u8x8);
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1320_cs1_160x32_init_seq);
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break;
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case U8X8_MSG_DISPLAY_SET_FLIP_MODE:
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if ( arg_int == 0 ){
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1320_cs1_160x32_nhd_flip0_seq);
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u8x8->x_offset = u8x8->display_info->default_x_offset;
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}
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else{
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1320_cs1_160x32_nhd_flip1_seq);
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u8x8->x_offset = u8x8->display_info->flipmode_x_offset;
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}
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break;
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default:
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return u8x8_d_ssd1320_common(u8x8, msg, arg_int, arg_ptr);
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}
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return 1;
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}
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/*=========================================================*/
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/* 160x132 (actually 320x132) */
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static const uint8_t u8x8_d_ssd1320_cs1_160x132_nhd_flip0_seq[] = {
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
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U8X8_C(0x0a0), /* remap */
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U8X8_C(0xc8), /* Set COM Output Scan Direction: normal mode CS1 */
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U8X8_CA(0xd3, 0x0e), /* CS1 */
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U8X8_END_TRANSFER(), /* disable chip */
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U8X8_END() /* end of sequence */
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};
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static const uint8_t u8x8_d_ssd1320_cs1_160x132_nhd_flip1_seq[] = {
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
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U8X8_C(0x0a1), /* remap */
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U8X8_C(0xc0), /* Set COM Output Scan Direction: normal mode CS1 */
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U8X8_CA(0xd3, 0x92), /* CS1 */
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U8X8_END_TRANSFER(), /* disable chip */
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U8X8_END() /* end of sequence */
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};
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static const u8x8_display_info_t u8x8_d_ssd1320_cs1_160x132_display_info =
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{
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/* chip_enable_level = */ 0,
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/* chip_disable_level = */ 1,
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/* post_chip_enable_wait_ns = */ 20,
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/* pre_chip_disable_wait_ns = */ 10,
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/* reset_pulse_width_ms = */ 100, /* ssd1320: 2 us */
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/* post_reset_wait_ms = */ 100, /* far east OLEDs need much longer setup time */
|
|
/* sda_setup_time_ns = */ 50, /* ssd1320: 15ns, but cycle time is 100ns, so use 100/2 */
|
|
/* sck_pulse_width_ns = */ 50, /* ssd1320: 20ns, but cycle time is 100ns, so use 100/2, AVR: below 70: 8 MHz, >= 70 --> 4MHz clock */
|
|
/* sck_clock_hz = */ 10000000UL, /* since Arduino 1.6.0, the SPI bus speed in Hz. Should be 1000000000/sck_pulse_width_ns, increased to 8MHz (issue 215), 10 MHz (issue 301) */
|
|
/* spi_mode = */ 0, /* active high, rising edge */
|
|
/* i2c_bus_clock_100kHz = */ 4,
|
|
/* data_setup_time_ns = */ 10,
|
|
/* write_pulse_width_ns = */ 150, /* ssd1320: cycle time is 300ns, so use 300/2 = 150 */
|
|
/* tile_width = */ 20, /* 160 pixel, so we require 20 bytes for this */
|
|
/* tile_height = */ 17,
|
|
/* default_x_offset = */ 0, /* this is the byte offset (there are two pixel per byte with 4 bit per pixel) */
|
|
/* flipmode_x_offset = */ 0,
|
|
/* pixel_width = */ 160,
|
|
/* pixel_height = */ 132
|
|
};
|
|
|
|
|
|
/* the following sequence will work, but requires contrast to be very high */
|
|
/* added #ifdef to avoid compiler warning, issue 1802 */
|
|
#ifdef NOT_USED
|
|
static const uint8_t u8x8_d_ssd1320_cs1_160x132_init_seq[] = {
|
|
|
|
U8X8_DLY(1),
|
|
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
|
|
U8X8_DLY(1),
|
|
|
|
U8X8_C(0xae), /* display off */
|
|
U8X8_CA(0xd5, 0xC2), /* set display clock divide ratio/oscillator frequency (set clock as 80 frames/sec) */
|
|
U8X8_CA(0xa8, 0x83), /* multiplex ratio 1/132 Duty */
|
|
U8X8_CA(0xa2, 0x00), /* display start line */
|
|
|
|
U8X8_C(0xa0), /* Set Segment Re-Map: column address 0 mapped to SEG0 CS1 */
|
|
// U8X8_C(0xa1), /* Set Segment Re-Map: column address 0 mapped to SEG0 CS2 */
|
|
|
|
U8X8_C(0xc8), /* Set COM Output Scan Direction: normal mode CS1 */
|
|
// U8X8_C(0xc0), /* Set COM Output Scan Direction: normal mode CS2 */
|
|
|
|
U8X8_CA(0xd3, 0x0e), /* CS1 */
|
|
// U8X8_CA(0xd3, 0x92), /* CS2 */
|
|
|
|
U8X8_CA(0xda, 0x12), /* Set SEG Pins Hardware Configuration: */
|
|
U8X8_CA(0x81, 0x5a), /* contrast */
|
|
U8X8_CA(0xd9, 0x22), /* Set Phase Length */
|
|
U8X8_CA(0xdb, 0x30), /* VCOMH Deselect Level */
|
|
U8X8_CA(0xad, 0x10), /* Internal IREF Enable */
|
|
U8X8_CA(0x20, 0x00), /* Memory Addressing Mode: Horizontal */
|
|
U8X8_CA(0x8d, 0x01), /* disable internal charge pump 1 */
|
|
U8X8_CA(0xac, 0x00), /* disable internal charge pump 2 */
|
|
U8X8_C(0xa4), /* display on */
|
|
U8X8_C(0xa6), /* normal display */
|
|
|
|
U8X8_DLY(1), /* delay 2ms */
|
|
|
|
U8X8_END_TRANSFER(), /* disable chip */
|
|
U8X8_END() /* end of sequence */
|
|
};
|
|
#endif
|
|
|
|
/*
|
|
OLED_WR_Byte(0xae,OLED_CMD);//Display OFF
|
|
OLED_WR_Byte(0xfd,OLED_CMD);//Set Command Lock
|
|
OLED_WR_Byte(0x12,OLED_CMD);
|
|
OLED_WR_Byte(0x20,OLED_CMD);//Set Memory Addressing Mode
|
|
OLED_WR_Byte(0x00,OLED_CMD);
|
|
OLED_WR_Byte(0x25,OLED_CMD);//Set Portrait Addressing Mode
|
|
OLED_WR_Byte(0x00,OLED_CMD);//Normal Addressing Mode
|
|
OLED_WR_Byte(0x81,OLED_CMD);//Set Contrast Control
|
|
OLED_WR_Byte(0x6b,OLED_CMD);
|
|
OLED_WR_Byte1(0xa0,OLED_CMD,1);//Set Seg Remap LEFT DISPLAY
|
|
OLED_WR_Byte1(0xa1,OLED_CMD,2);//Set Seg Remap RIGHT DISPLAY
|
|
OLED_WR_Byte(0xa2,OLED_CMD);//Set Display Start Line
|
|
OLED_WR_Byte(0x00,OLED_CMD);
|
|
OLED_WR_Byte(0xa4,OLED_CMD);//Resume to RAM content display
|
|
OLED_WR_Byte(0xa6,OLED_CMD);//Set Normal Display
|
|
|
|
OLED_WR_Byte(0xa8,OLED_CMD);//Set MUX Ratio
|
|
OLED_WR_Byte(0x83,OLED_CMD);//1/132 duty
|
|
|
|
OLED_WR_Byte(0xad,OLED_CMD);//Select external or internal IREF
|
|
OLED_WR_Byte(0x10,OLED_CMD);
|
|
OLED_WR_Byte(0xbc,OLED_CMD);//Set Pre-charge voltage
|
|
OLED_WR_Byte(0x1e,OLED_CMD);//
|
|
OLED_WR_Byte(0xbf,OLED_CMD);//Linear LUT
|
|
OLED_WR_Byte1(0xc8,OLED_CMD,1);//Set COM Output Scan Direction LEFT DISPLAY
|
|
OLED_WR_Byte1(0xc0,OLED_CMD,2);//Set COM Output Scan Direction RIGHT DISPLAY
|
|
OLED_WR_Byte(0xd3,OLED_CMD);//Set Display Offset
|
|
OLED_WR_Byte1(0x0e,OLED_CMD,1); //LEFT DISPLAY
|
|
OLED_WR_Byte1(0x92,OLED_CMD,2); // RIGHT DISPLAY
|
|
OLED_WR_Byte(0xd5,OLED_CMD);//Set Display Clock Divide Ratio/Oscillator Frequency
|
|
OLED_WR_Byte(0xc2,OLED_CMD);//85Hz
|
|
OLED_WR_Byte(0xd9,OLED_CMD);//Set Pre-charge Period
|
|
OLED_WR_Byte(0x72,OLED_CMD);//
|
|
OLED_WR_Byte(0xda,OLED_CMD);//Set SEG Pins Hardware Configuration
|
|
OLED_WR_Byte(0x32,OLED_CMD);
|
|
OLED_WR_Byte(0xbd,OLED_CMD);//Set VP
|
|
OLED_WR_Byte(0x03,OLED_CMD);
|
|
OLED_WR_Byte(0xdb,OLED_CMD);//Set VCOMH
|
|
OLED_WR_Byte(0x30,OLED_CMD);
|
|
OLED_WR_Byte(0xaf,OLED_CMD);//Display on
|
|
*/
|
|
static const uint8_t u8x8_d_ssd1320_160x132_init_seq[] = {
|
|
U8X8_DLY(1),
|
|
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
|
|
U8X8_DLY(1),
|
|
|
|
U8X8_C(0xae), /* display off */
|
|
U8X8_CA(0xd5, 0xC2), /* set display clock divide ratio/oscillator frequency (set clock as 80 frames/sec) */
|
|
U8X8_CA(0xa8, 0x83), /* multiplex ratio 1/132 Duty */
|
|
U8X8_CA(0xa2, 0x00), /* display start line */
|
|
|
|
U8X8_C(0xa0), /* Set Segment Re-Map: column address 0 mapped to SEG0 CS1 */
|
|
// U8X8_C(0xa1), /* Set Segment Re-Map: column address 0 mapped to SEG0 CS2 */
|
|
|
|
U8X8_C(0xc8), /* Set COM Output Scan Direction: normal mode CS1 */
|
|
// U8X8_C(0xc0), /* Set COM Output Scan Direction: normal mode CS2 */
|
|
|
|
U8X8_CA(0xad, 0x10), /* select Iref: 0x00 external (reset default), 0x10 internal */
|
|
U8X8_CA(0xbc, 0x1e), /* pre-charge voltage level 0x00..0x1f, reset default: 0x1e */
|
|
U8X8_C(0xbf), /* select linear LUT */
|
|
U8X8_CA(0xd5, 0xc2), /* Bit 0..3: clock ratio 1, 2, 4, 8, ...256, reset=0x1, Bit 4..7: F_osc 0..15 */
|
|
U8X8_CA(0xd9, 0x72), /* Set Phase 1&2 Length, Bit 0..3: Phase 1, Bit 4..7: Phase 2, reset default 0x72 */
|
|
U8X8_CA(0xbd, 0x03), /* from the vendor init sequence */
|
|
U8X8_CA(0xdb, 0x30), /* VCOMH Deselect Level */
|
|
|
|
|
|
U8X8_CA(0xd3, 0x0e), /* CS1 */
|
|
// U8X8_CA(0xd3, 0x92), /* CS2 */
|
|
|
|
U8X8_CA(0xda, 0x12), /* Set SEG Pins Hardware Configuration: */
|
|
U8X8_CA(0x81, 0x6b), /* contrast */
|
|
//U8X8_CA(0xd9, 0x22), /* Set Phase Length */
|
|
//U8X8_CA(0xdb, 0x30), /* VCOMH Deselect Level */
|
|
//U8X8_CA(0xad, 0x10), /* Internal IREF Enable */
|
|
U8X8_CA(0x20, 0x00), /* Memory Addressing Mode: Horizontal */
|
|
//U8X8_CA(0x8d, 0x01), /* unknown in SSD1320 datasheet, disable internal charge pump 1 */
|
|
//U8X8_CA(0xac, 0x00), /* unknown in SSD1320 datasheet, disable internal charge pump 2 */
|
|
U8X8_C(0xa4), /* display RAM on */
|
|
U8X8_C(0xa6), /* normal display */
|
|
|
|
U8X8_DLY(1), /* delay 2ms */
|
|
|
|
U8X8_END_TRANSFER(), /* disable chip */
|
|
U8X8_END() /* end of sequence */
|
|
};
|
|
|
|
uint8_t u8x8_d_ssd1320_160x132(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
|
|
{
|
|
switch(msg)
|
|
{
|
|
case U8X8_MSG_DISPLAY_SETUP_MEMORY:
|
|
u8x8_d_helper_display_setup_memory(u8x8, &u8x8_d_ssd1320_cs1_160x132_display_info);
|
|
|
|
break;
|
|
|
|
case U8X8_MSG_DISPLAY_INIT:
|
|
u8x8_d_helper_display_init(u8x8);
|
|
// u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1320_cs1_160x132_init_seq);
|
|
u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1320_160x132_init_seq);
|
|
break;
|
|
|
|
case U8X8_MSG_DISPLAY_SET_FLIP_MODE:
|
|
if ( arg_int == 0 ){
|
|
u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1320_cs1_160x132_nhd_flip0_seq);
|
|
u8x8->x_offset = u8x8->display_info->default_x_offset;
|
|
}
|
|
else{
|
|
u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1320_cs1_160x132_nhd_flip1_seq);
|
|
u8x8->x_offset = u8x8->display_info->flipmode_x_offset;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
return u8x8_d_ssd1320_common(u8x8, msg, arg_int, arg_ptr);
|
|
}
|
|
return 1;
|
|
}
|
|
|
|
|
|
|
|
|
|
/*=========================================================*/
|
|
/* https://github.com/olikraus/u8g2/issues/1816 */
|
|
/* 160x80, https://de.aliexpress.com/item/1005003510267760.html */
|
|
|
|
static const uint8_t u8x8_d_ssd1320_160x80_flip0_seq[] = {
|
|
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
|
|
U8X8_C(0x0a0), /* remap */
|
|
U8X8_C(0xc8), /* Set COM Output Scan Direction: normal mode CS1 */
|
|
U8X8_CA(0xd3, 39), /* display offset */
|
|
U8X8_END_TRANSFER(), /* disable chip */
|
|
U8X8_END() /* end of sequence */
|
|
};
|
|
|
|
static const uint8_t u8x8_d_ssd1320_160x80_flip1_seq[] = {
|
|
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
|
|
U8X8_C(0x0a1), /* remap */
|
|
U8X8_C(0xc0), /* Set COM Output Scan Direction: normal mode CS1 */
|
|
U8X8_CA(0xd3, 120), /* display offset */
|
|
U8X8_END_TRANSFER(), /* disable chip */
|
|
U8X8_END() /* end of sequence */
|
|
};
|
|
|
|
static const u8x8_display_info_t u8x8_d_ssd1320_160x80_display_info =
|
|
{
|
|
/* chip_enable_level = */ 0,
|
|
/* chip_disable_level = */ 1,
|
|
|
|
/* post_chip_enable_wait_ns = */ 20,
|
|
/* pre_chip_disable_wait_ns = */ 10,
|
|
/* reset_pulse_width_ms = */ 100, /* ssd1320: 2 us */
|
|
/* post_reset_wait_ms = */ 100, /* far east OLEDs need much longer setup time */
|
|
/* sda_setup_time_ns = */ 50, /* ssd1320: 15ns, but cycle time is 100ns, so use 100/2 */
|
|
/* sck_pulse_width_ns = */ 50, /* ssd1320: 20ns, but cycle time is 100ns, so use 100/2, AVR: below 70: 8 MHz, >= 70 --> 4MHz clock */
|
|
/* sck_clock_hz = */ 10000000UL, /* since Arduino 1.6.0, the SPI bus speed in Hz. Should be 1000000000/sck_pulse_width_ns, increased to 8MHz (issue 215), 10 MHz (issue 301) */
|
|
/* spi_mode = */ 0, /* active high, rising edge */
|
|
/* i2c_bus_clock_100kHz = */ 4,
|
|
/* data_setup_time_ns = */ 10,
|
|
/* write_pulse_width_ns = */ 150, /* ssd1320: cycle time is 300ns, so use 300/2 = 150 */
|
|
/* tile_width = */ 20, /* 160 pixel, so we require 20 bytes for this */
|
|
/* tile_height = */ 10,
|
|
/* default_x_offset = */ 0, /* this is the byte offset (there are two pixel per byte with 4 bit per pixel) */
|
|
/* flipmode_x_offset = */ 0,
|
|
/* pixel_width = */ 160,
|
|
/* pixel_height = */ 80
|
|
};
|
|
|
|
|
|
|
|
static const uint8_t u8x8_d_ssd1320_160x80_init_seq[] = {
|
|
U8X8_DLY(1),
|
|
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
|
|
U8X8_DLY(1),
|
|
|
|
U8X8_C(0xae), /* display off */
|
|
U8X8_CA(0xa8, 80), /* multiplex ratio 1/80 Duty */
|
|
U8X8_CA(0xa2, 0), /* display start line */
|
|
|
|
U8X8_C(0xa0), /* Set Segment Re-Map */
|
|
U8X8_C(0xc8), /* Set COM Output Scan Direction: normal mode */
|
|
|
|
U8X8_CA(0xad, 0x10), /* select Iref: 0x00 external (reset default), 0x10 internal */
|
|
U8X8_CA(0xbc, 0x1e), /* pre-charge voltage level 0x00..0x1f, reset default: 0x1e */
|
|
U8X8_C(0xbf), /* select linear LUT */
|
|
U8X8_CA(0xd5, 0xc2), /* Bit 0..3: clock ratio 1, 2, 4, 8, ...256, reset=0x1, Bit 4..7: F_osc 0..15 */
|
|
U8X8_CA(0xd9, 0x72), /* Set Phase 1&2 Length, Bit 0..3: Phase 1, Bit 4..7: Phase 2, reset default 0x72 */
|
|
|
|
U8X8_CA(0xd3, 39), /* display offset */
|
|
|
|
U8X8_CA(0xda, 0x12), /* Set SEG Pins Hardware Configuration: */
|
|
U8X8_CA(0x81, 0x70), /* contrast */
|
|
U8X8_CA(0x20, 0x00), /* Memory Addressing Mode: Horizontal */
|
|
|
|
U8X8_C(0xa4), /* display RAM on */
|
|
U8X8_C(0xa6), /* normal display */
|
|
|
|
U8X8_DLY(1), /* delay 2ms */
|
|
|
|
U8X8_END_TRANSFER(), /* disable chip */
|
|
U8X8_END() /* end of sequence */
|
|
};
|
|
|
|
uint8_t u8x8_d_ssd1320_160x80(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
|
|
{
|
|
|
|
if ( u8x8_d_ssd1320_common_2(u8x8, msg, arg_int, arg_ptr) != 0 )
|
|
return 1;
|
|
|
|
switch(msg)
|
|
{
|
|
case U8X8_MSG_DISPLAY_SETUP_MEMORY:
|
|
u8x8_d_helper_display_setup_memory(u8x8, &u8x8_d_ssd1320_160x80_display_info);
|
|
break;
|
|
|
|
case U8X8_MSG_DISPLAY_INIT:
|
|
u8x8_d_helper_display_init(u8x8);
|
|
u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1320_160x80_init_seq);
|
|
break;
|
|
|
|
case U8X8_MSG_DISPLAY_SET_FLIP_MODE:
|
|
if ( arg_int == 0 ){
|
|
u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1320_160x80_flip0_seq);
|
|
u8x8->x_offset = u8x8->display_info->default_x_offset;
|
|
}
|
|
else{
|
|
u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1320_160x80_flip1_seq);
|
|
u8x8->x_offset = u8x8->display_info->flipmode_x_offset;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
return 1;
|
|
}
|
|
|